Computer Science – Computer Organization

From a given tautology, another tautology can be derived by interchanging

Which of the following logical operations produce a 0 if the inputs are 1, 1, and 0?

Choose the correct answer.
If X is a Boolean variables, then

If X, Y and Z are three Boolean variables then

Which of the following codes needs 7 bits to represent a character?

Which of the following are not weighted codes?

The minimum time delay between the initiations of two independent memory operations is called

If X, Y and Z are 3 Boolean variables, then X( Y + Z) equals ( X + Y) (X + Z).
If X, Y, Z take the values

Which of the following comments about the Program Counter (PC) are true?

If (123)₅ = (A3)_B then the number of possible values of A is

The speed imbalance between memory access and CPU operation can be reduced by

If (12A)₃ = (123)_A then the values of A is

Choose the correct statements.

Which of the following does not need extra hardware for DRAM refreshing?

The advantage of MOS devices over bipolar devices is

The Boolean expression X + X’Y equals

(X + Y) + Z = X + (Y + Z)

Which of the following are registers?

Which of the following remarks about BCD are true?

The first operating system used in microprocessors is

Which of the following remarks about PLA is/are true?

Any given truth table can be represented by a

A number system uses 20 as the radix. The excess code that is necessary for its equivalent binary coded representation is

Choose the correct statements.

A + B can be implemented by

Bipolar devices are desirable in the fabrication of which of the following components?

Which of the following is the programmable internal timer?

The idea of cache memory is based on the

Which of the following weight makes the complement operation easier in BCD form?

The sequence of events that happen during a typical fetch operation is

Any given Boolean expression can be implemented by using

To get Boolean expression in the product of sum form, from a given Karnaugh map

The Boolean expression AB + AB’ + A’C + AC is unaffected by the value of the Boolean variable

The minimum number of gates required to implement the Boolean expression
AB + AB’ + A’C is

Property of locality of reference may fail if a program has

Which of the following comments about half adder are true?

The binary equivalent of the decimal number 0.4375 is

The Boolean expression (A + C) (AB’ + A’C) (A’C’ + B’) can be simplified to

A byte addressable computer has a memory capacity of 2^m kbytes and can perform 2ⁿ operations. An instruction involving 3 operands and one operator needs a maximum of

The number of column in a state table for a sequential circuit with ‘m’ flip-flops and ‘n’ input is

In the previous problem, if the computer is word addressable with the word size being 8 bytes then the answer will be

A computer uses ternary system instead of the traditional binary system. An ‘n’ bit string in the binary system will occupy

The Boolean expression A’BE + BCDE + BC’D’E + A’B’DE’ + B’C’DE’ can be simplified to BE + B’DE’. if the don’t care conditions are

The decimal equivalent of the binary number 101.101 is

Which of the following does not have 8 data lines?

Which of the following logic families is well suited for high-speed operation?

The following arrangement of JK flip-flips does the function of a

Negative numbers cannot be represented in

The addressing mode used in an instruction of the form ADD X Y, is

The combinational circuit in Fig. 8.2 can be replaced

(10110011100011110000)₂ in bace 32 is

The XOR operator is

Bubble memories are preferable to floppy disks because

Addressing capability of 8086/88 is

The following circuit produces the output sequence

Which of the following units can be used to measure the speed of a computer?

if A φ B = C ( φ stands for the XOR operator), then

Which of the following operation(s) is/are not closed are regards to computers?

If (11A1B)₈ = (12c9)₁₆ (c stands for decimal 12), then the value of A and B are

The total number of possible Boolean functions involving ‘n’ Boolean variables is

Which of he following architecture is/are not suitable for realizing SIMD?

How many 2- input multiplexers are required to construct a 2¹⁰– input multiplexer?

Let A be a set having ‘n’ elements. The number of binary operations that can be defined on A is

The value of X and Y, if (x567)₈ + (2yx5)₈ = (71yx)₈ is

A decimal number has 25 digits. The number of bits needed for its equivalent binary representation is, approximately,

The number of instructions needed to add’n’ numbers and store the result in memory using only one address instructions is

The Boolean expression corresponding to the circuit in Fig. 8.4 is

The clock of a microprocessor can be divided by 5 using a

The minimal cover for the maximal compatibility classes {ae, acd, ad, bd} is

The value of a, x, y if 47×80 is the 10’s complement of yaya0 are

The reasons for the presence of ALE pin in 8085, but not in 6800 is that

If memory access takes 20 ns with cache and 110 ns without it, then the hit-ratio (cache uses a 10 ns memory) is,

In which of the following instructions bus idle situation occurs?

Any instruction should have at least

Consider circuit in Fig. 8.5
In order to make it a tautology the ‘?’ marked box should be replaced by

If the cache needs an access time of 20 ns and the main memory 120 ns, then the average access time of a CPU is (assume hit-ratio is 80%)

The number of clock cycles necessary to complete 1 fetch cycle in 8085 (excluding wait state) is

The seek time of a disk in 30 ms. It rotates at the rate of 30 rotations per second. Each Track has a capacity of 300 words. The access time is approximately

Motorola’s 68040 is comparable to

The possible number of Boolean functions of 3 variables X, Y and Z such that
f (X, Y, Z) = f (X’, y’, Z’) is

Which of the following interrupt is both level and edge sensitive?

The difference between 80486 and 80386 is/are

The addressing mode used in the instruction PUSH B is

The most relevant addressing mode to write position independent code is

Which of the following are CISC machines

Which of the following rules regarding the addition of 2 given numbers is correct, if negative numbers are represented in 2’s complement form?

When INTR is encountered, the processor branches to the memory location, which is

The advantage of a single bus over a multi-bus is the

The number of possible Boolean functions that can be defined for n Boolean variables over n-valued Boolean algebra is

The ASCII code 56, represents the character

Parallel printer uses

A microprogrammed control unit

Which of the following are typical characteristics of a RISC machine?

The working of a staircase switch is a typical example of the logical operation

The exponent of a floating-point number is represented in excess-N code so that

On receiving an interrupt from an I/O device, the CPU

The Karnaugh map for the Boolean function F of 4 Boolean variables is given in Fig. 8.6 A, B, C are don’t care conditions What values of A, B, C, will result in the minimal exprestion?

In serial communication an extra clock is needed

If negative number are stored in 2’s complement form, the range of numbers that can be stored in 8 bits is

If SUB A,B means B – A, then SUB 4 (R0), *5 (R1) means ( (X) means content of register or memory location X)

A computer uses a floating -point representation comprising a signed magnitude fractional mantissa and an excess-16 base-8 exponent. What decimal number is represented by a floating-point number whose exponent is 10011, mantissa 101000, and the sign bit set?

The binary equivalent of the Gray code 11100 is

The minimum number of 2-input NAND gates required to implement the function
F = (x’ + y’) (z+w) is

The output of a 3-input logic circuit f (x, y, z) is 1 if ax+by+cz < d and 0. otherwise (a, b, c, d are constants) For what values of a, b, c, d does this represent an implementation of the AND gate?

Which of the following is the minimum error code?

A certain machine uses expanding opcode. It has 16 bit instructions and 6 bit addresses It supports one address and two address and two address instructions only. If there are ‘n’ two address instructions the maximum number of one address instruction is

How many characters per sec (7 bits + parity) can be transmitted over a 2400-bps line in asynchronous mode?

The Boolean expression A + BC equals

In a ripple counter using edge-triggered JK flip-flops, the pulse input is applied to the

The logic circuit in Fig. 8.7 performs the function of a

In a positive edge triggered JK flip-flop, a low J and a low K produces

Programming in language that actually controls the path of signals or data within the computer is called

An assembler that run on one machine but produces machine code for another machine is called

When even-parity ASCII text is transmitted asynchronously at a rate of 10 characters per sec over a 110-bps line, what percentage of the received bits actually contain data ( as opposed to over head)?

Which of the following is not typically found in the status register of a microprocessor?

The output F, of the circuit given in Fig. 8.8 is given by

Most of the digital computers do not have floating-pointing hardware because

‘n’ flip-flops will divide the clock frequency by a factor of

A toggle operation cannot be performed using a signle

Micro program is

The three main components of a digital computer system are

A subtractor is not usually present in a computer because

Let a_n a_n-1 . . . a₁a₀ be the  binary representation of an integer b, The integer b is divisible by 3 if

Which of the following 4-bits numbers equals its I’s complement?

Which of the following 4-bit members equals its 1’s complement?

FFFF will be the last memory location in a memory of size

If you want to design a boundary counter, you should prefer a flip-flop of

Suppose the largest n-bit binary number required ‘d’ digits in decimal representation. Which of the following relation between ‘n’ and’d’ is approximately correct?

A computer uses 8-digit mantissa and 2-digit exponent. If a = 0.052 and b = 28E + 11, then b+a-b will

In Question 129, ‘a’ will actually be stored as (the ‘/’ is separating the mantissa and the exponent)

Which of the following binary numbers are not divisible by 4?

A computer with a 32-bit wide data bus uses 4 k x 8 static RAM memory chips. The smallest memory this computer can have is

Word 20 contains 40
Word 30 contains 50
Word 40 contains 60
Word 50 contains 70
Which of the following instructions loads 60 into the accumulator?

An index register in a digital computer is used for

A Chip having 150 gates will be classified as

A microprocessor with a clock frequency of 100 MHz will have a clock period of

Which of the following is volatile?

Pseudo-instructions are

The cost for storing a bit is minimum in

Introducing parity bit for error detection does not imply

How many flip-flop circuits are needed to divide by 16?

A flip-flop circuit can be used for

The number of 1’s in the binary representation of the decimal expression

16³x9 + 16² x7 + 16×5 + 3 is

Which of the following instruction will not be there in a memory-mapped I/O system?

The Trap interrupt mechanism of the 8085 microprocessor

The ALE line of an 8085 microprocessor is used to

Consider an 8085-based system operating with the following specifications.
Crystal frequency – 6 MHz
ROM map- 0 0 0 0 through 07FF
ROM map- 0 0 0 0 through 17FF
ROM requires 1 wait state
RAM requires no wait state
Assume the content of PC is 0200.
The instruction cycle time needed for the instruction ORI A,22 is

In Question 147, the instruction DCR M, needs an instruction cycle time of

With a clock frequency of 3 MHz, the execution time for the instruction, “STA addr” of 8085 will be

Choose the incorrect statement.
For a microprocessor system using I/O mapped I/O

The first operation performed in INTEL 8085 after RESET is

RLC instruction is equivalent to

After the execution of CMP A instruction

The 8085 μP will enter into INA cycle after the recognition of

Which of the following lists the interrupts in decreasing priority?

The interrupt vector address for TRAP is

In order to reset carry without affecting accumulator content, one has to use

Consider the following program fragment.
LXI H, 0106H
DCR L
Loop : DCX H
NZ LOOP
HLT
LOOP will be executed

Consider the following program fragment.
START : MVI C, FFH
INX B
LOOP : ADD B
DCR C
JAZ LOOP
HLT
LOOP will be executed

Consider the following four instructions.
1) PUSH PSW
2) CALL ADDR
3) XTHL
4) RST n
The stack pointer will be affected by the instruction(s)

MVI B, 00
MVI A, 1cH
DCR B
DAA
STA TEMP
HLT
The content of the TEMP location after the execution of the above program is

Which of the following instructions requires the most number of T-states?

Consider the following program. Assume that the program is stored in R/W memory.
Initial condition: (A000H) = 00H
8000:            31 07 80 LXI sp, 8007H
8003:          3E 76 MVI A, 76H
8005: F5      PUSH PSW
8006:          3A 00 A0 LDA A000H
8009: F1          POP PSW
800A:        3A 00 A0 STA A000H
800D  76               HLT
The content of the location A000H after the execution of the above program is

The 8085 μP enters into wait state after the recognition of